One GUI, many engines

The main GUI sweeps W or L at constant I_D or g_m. This add-in sweeps both, giving a colour map of any parameter across the entire W–L plane with your specifications applied as a filter.

• Plot any OP parameter (|Z_dd|, g_ds, µ, noise) over W and L at constant I_D or g_m
• Filter on properties (with presets) greys out every sizing that fails your specs, drawing the feasible design region
• Contours + best marks the optimum; Pareto vs: overlays the trade-off front between two parameters
• Apply best pushes the recommended W and L straight into the main GUI, with the margin on each spec

Non-linearity of the real device, computed by a quasi-PSS engine rather than a fitted polynomial. Sweep it exactly like a DC sweep and read the sweet spot off the graph.

• Spectra with harmonics and noise; IP2/IP3, input- and output-referred, over constrained sweeps
• Analytic Taylor/Volterra 2-port expansion coefficients, which stay reliable near a sweet spot, where an FFT disappears into its own noise floor
• An n^th-order Verilog-A model generator, to pin down where the non-linearity comes from
• Headline outputs such as IIP3 can be pinned into the main OP pane, with a warning when a value approaches the noise floor

The same device and the same constrained sweep, now inside its embedding network. The device comes from the main GUI; you add the terminations around it.

• Y-, Z- and S-parameters, z_in, z_out, G, G_T, a_v, f_T, f_max and stability factors
• Set Z_Ss, Z_Sp, Z_L and inductive source degeneration, so the numbers describe your actual stage instead of a bare device
• Plot on x-y-z axes or on a Smith chart; sweep V_GS, V_DS, frequency, temperature, or (V_GS,W)/(V_GS,L) at constant I_D or g_m
• Export S-parameters to Touchstone, and cross-check the result against Spectre

The main GUI assumes a common-source device, which real circuits frequently are not. This add-in biases and evaluates the transistor in the configuration you actually built.

• Diode-switched, common-gate and MOS-capacitor configurations
• Decap-switched MOS: equivalent impedance and capacitance as a function of frequency
• Lumped non-quasi-static equivalents, so a decap's loss is visible long before layout
• Same process, corner and temperature settings as the main GUI

ProMOST is a MOS tool, but BiCMOS designs need their bipolar devices dimensioned too, in the same session and in the same way.

• Mextram-based operating point for NPN and PNP devices
• Noise, S-parameters and stability analysis
• The same sweep-and-read workflow as the MOS side of the tool
• Uses the bipolar model data from your converted PDK

The reverse direction: take the accurate device and derive the simple model, with every coefficient carrying a textbook meaning (β, V_TH, λ, C_ox), fitted at your operating point, in your technology.

• Square-law and simplified-EKV equivalents of the live device, regenerated automatically as you change the bias point
• Output as a ready-to-use Verilog-A module, a Mathematica fragment with plots, and an Excel workbook
• The workbook compares the idealized model against the full ProMOST model over V_DS and V_GS sweeps, so you can see exactly where they deviate
• Made for teaching and for hand analysis: the square law next to a real short-channel device

ProMOST as a calculation engine behind your own script, over a pipe or a socket, with Python, MATLAB or a Jupyter notebook on the other end.

# one setup line, then one line per sweep point
setup = "format=value;isn=true;l=0.5;vds=0.6;gm=10e-3;calcvgtvgs"
# W sweeps; VGS is re-solved at every point to hold gm on target
for w in widths:
    vgs, id_, oip3 = promost(f"w={w};vgs=?;id=?;OIP(1e9)=?")

• Select devices, set bias and sizing, run constrained sweeps, read OP, RF and IIP/OIP data
• Parameter studies and technology comparisons become scripts you rerun on every PDK update
• Feed results into your own optimizers, notebooks or regression suites
• Python and MATLAB examples ship with the distribution

Select a device on your schematic, size it in ProMOST and push the result back: a full round trip, not just an export.

• Start from the instance menu or a bindkey; W, L, m and n_f are copied automatically
• Process match and type match indicators confirm you are looking at the same device
• Load the bias point from dc, OP, tran or td-pss simulation data, with a slider that walks along the sweep variable or along time
• Optimize, then push the new geometry back into the schematic